1. Technical Field
The present invention relates to a circuit for generating pulses for a semiconductor memory apparatus and, more particularly, to a circuit for generating pulses for a semiconductor memory apparatus that outputs an overdriving pulse signal in response to a temperature variation.
2. Related Art
Referring to FIG. 1, a conventional circuit for generating pulses of a semiconductor memory apparatus includes a first inverter IV1, a delay unit 10, a NAND gate ND1 and a second inverter IV2.
The first inverter IV1 has an input terminal to which a sense amplifier driving signal SAEN is input. The delay unit 10 has an input terminal coupled to an output terminal of the first inverter IV1. The NAND gate ND1 has one input terminal coupled to an output terminal of the delay unit 10 and another input terminal receiving the sense amplifier driving signal SAEN. The second inverter IV2 has an input terminal coupled to an output terminal of the NAND gate ND1 and an output terminal outputting an overdriving pulse signal OVD_PUL.
As shown in FIG. 1, the sense amplifier driving signal SAEN is input to the first inverter IV1 and one input terminal of the NAND gate ND1. The sense amplifier driving signal SAEN input to the first inverter IV1 is inverted and then output to the delay unit 10. The delay unit 10 delays the inverted signal and outputs the delayed signal as an output signal to the NAND gate ND1. The NAND gate ND1 receives the sense amplifier driving signal SAEN and the output signal of the delay unit 10, generates a pulse signal having an active period corresponding to a delay time of the delay unit 10, and outputs the generated pulse signal to the second inverter IV2. The second inverter IV2 inverts the pulse signal and outputs the inverted pulse signal as the overdriving pulse signal OVD_PUL.
At a low temperature equal to or lower than 0° C., the threshold voltage of a transistor provided in a semiconductor memory apparatus rises and thus the tWR (write recovery time) characteristic of the semiconductor memory deteriorates rapidly. Since the above-mentioned general circuit for generating pulses for the semiconductor memory apparatus generates the overdriving pulse signal OVD_PUL having a fixed active period regardless of temperature, it is difficult to compensate for the deterioration of the tRW characteristic of the semiconductor memory apparatus at low temperatures. As a result, the operational performance of the semiconductor memory apparatus deteriorates.